The present disclosure relates to a solid-state imaging device, a manufacturing method thereof, and an electronic apparatus including a solid-state imaging device, such as a camera.
The CMOS (Complementary Metal Oxide Semiconductor) solid-state imaging device is known as a solid-state imaging device and this CMOS solid-state imaging device is widely used in digital still cameras, digital video camcorders, etc. In recent years, as the solid-state imaging device mounted in a mobile apparatus such as a cellular phone equipped with a camera and a personal digital assistant (PDA), the CMOS solid-state imaging device, whose supply voltage is low, is frequently used in view of the power consumption and so forth.
In the CMOS solid-state imaging device, the unit pixel is formed with a photodiode serving as a photoelectric converter and plural pixel transistors. The CMOS solid-state imaging device has a pixel array (pixel area) in which the plural unit pixels are arranged in a two-dimensional array manner and a peripheral circuit area. The plural pixel transistors are formed of MOS transistors and are composed of three transistors, i.e. a transfer transistor, a reset transistor, and an amplification transistor, or four transistors further including a selection transistor in addition to these three transistors.
As such a CMOS solid-state imaging device, there have been proposed various related-art solid-state imaging devices configured as one device by electrically connecting a semiconductor chip in which the pixel array obtained by arranging plural pixels is formed to a semiconductor chip in which a logic circuit to execute signal processing is formed. For example, Japanese Patent Laid-open No. 2006-49361 discloses a semiconductor module obtained by connecting a back-illuminated image sensor chip having a micro-pad for each pixel cell to a signal processing chip having a signal processing circuit and a micro-pad by a micro-bump.
WO2006/129762 discloses a semiconductor image sensor module obtained by stacking a first semiconductor chip including an image sensor, a second semiconductor chip including an analog/digital converter array, and a third semiconductor chip including a memory element array. The first semiconductor chip is connected to the second semiconductor chip via a bump as an electrically-conductive connecting conductor. The second semiconductor chip is connected to the third semiconductor chip by a penetrating contact that penetrates the second semiconductor chip.